Time-to-Market ↓
Accelerate execution through workflow automation, faster debugging, and fewer iterations.
Skilled in chip design and passionate about chip optimizations
Transform how chips are designed
Empower leaner teams to deliver higher-quality chips on faster schedules.
Accelerate execution through workflow automation, faster debugging, and fewer iterations.
Verification-optimized flows with stronger coverage confidence and reliable sign-off.
PPA-driven architectural recommendations and backend optimizations.
Smaller teams, fewer re-spins, and more compute-efficient pipelines.
Specification reasoning, optimal IP selection, and early trade-off exploration.
QoR-aware RTL, targeted test generation, and coverage gap closure.
Fewer iterations with constraint guidance and closed-loop optimization.
Progressive testing with transparent coverage tracking.
If you are passionate about applied AI research, product management, EDA innovation, or sales/marketing
and you thrive on bold, out-of-the-box thinking
join us as part of the founding team at an early-stage deep-tech startup with enormous potential.
We’d love to hear from you. Whether you’re interested in early access, partnership, or simply a conversation — reach out anytime.
📍 San Jose, CA, USA 95134
